24 June 2022

News: June 2022

Project F news is back! It’s been a while, so this edition covers the first half of 2022. There are six new blog posts to cover as well as plans for the next few months. News will now be quarterly, with the next update in late September 2022. For more frequent updates on new blog posts and FPGA designs, follow @WillFlux (Mastodon) or @WillFlux (Twitter). You can also find me on 1BitSquared Discord and open a GitHub Issue if you spot a bug or have a feature request. Read more

15 June 2022

Simple Clock Domain Crossing

Sometimes you need to send a single pulse from one clock domain to another. This is a simple case of clock domain crossing or CDC. This FPGA recipe uses the xd module from the Project F Library to handle such situations simply and safely. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) NB. Additional content will be added to this post over summer 2022. Sponsor My Work Read more

7 May 2022

Display Signals

Welcome back to Exploring FPGA Graphics. Last time, we played Pong against our FPGA; this time, we revisit displays signals and learn about palettes and indexed colour. This post was last updated in June 2022. In this series, we explore graphics at the hardware level and get a feel for the power of FPGAs. We’ll learn how screens work, play Pong, create starfields and sprites, paint Michelangelo’s David, simulate life, draw lines and triangles, and animate characters and shapes. Read more

12 March 2022

Racing the Beam

Welcome back to Exploring FPGA Graphics. Last time, we got introduction to FPGA graphics; now, we’re ready to put our graphical skills to work with some simple demos. I hope these examples inspire you to create your own demos and improve your hardware design skills. This post was last updated in June 2022. In this series, we explore graphics at the hardware level and get a feel for the power of FPGAs. Read more

3 December 2021

News: November 2021

Welcome to your November news from Project F. This month’s new blog post covers multiplication with DSPs, plus there are loads of interesting links and an FPGA advent calendar. I’m also happy to report that the main Project F repo projf-explore passed 200 stars on GitHub. Want to get in touch? Share your thoughts with @WillFlux or find me on 1BitSquared Discord. The Project F blog is resting over the winter. Read more

27 November 2021

Multiplication with FPGA DSPs

Welcome back to my series covering mathematics and algorithms with FPGAs. I was initially going to look at real numbers in this part, but Project F is known for its practical, hands-on tutorials. So, I decided to dedicate a post to a topic usually ignored by introductory guides: multiplication with DSPs. We’ll cover real numbers in the next post. This post was last updated in December 2021. New to the series? Read more

31 October 2021

News: October 2021

Welcome to October’s update from Project F. This month, we build a rainbow from circles, learn more about numbers in Verilog, find a UART in the library, and hear about exciting FPGA projects from Ben Blundell and Rob Shelton. Want to get in touch? Share your thoughts with @WillFlux or find me on 1BitSquared Discord. Read the November 2021 news or see the news archive. Filled Circles I’ve added a new filled circle drawing module to the Verilog Library. Read more

9 October 2021

News: September 2021

Project F news is your monthly bowl of FPGA goodness with tasty tips and links from other developers mixed in. This month I began a new series on Maths & Algorithms, added a new rotation demo, and started a new blog on computing history. September also saw the release of Yosys 0.10 and the sad death of Sir Clive Sinclair. Want to get in touch? Share your thoughts with @WillFlux or find me on 1BitSquared Discord. Read more

30 September 2021

Numbers in Verilog

Welcome to my new series covering mathematics and algorithms with FPGAs. Whatever hardware you’re designing, you’re likely to be working with numbers. This series begins with the basics of Verilog numbers, covers simple mathematics, including division and CORDIC, before looking at more complex algorithms, such as data compression. This post was last updated in February 2022. In this first post, we examine how integers (whole numbers) are represented and dig into the challenges of signed numbers in Verilog. Read more

3 September 2021

News: August 2021

Project F news is your monthly bowl of FPGA goodness with tasty tips and links from other developers mixed in. August saw my first circle drawn, new graphics designs for iCEBreaker, improved build instructions, and the first draft of a new post covering animated graphics and double buffering. Want to get in touch? Share your thoughts with @WillFlux or find me on 1BitSquared Discord. Read the September 2021 news or see the news archive. Read more

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