31 October 2021

News: October 2021

Welcome to October’s update from Project F. This month, we build a rainbow from circles, learn more about numbers in Verilog, find a UART in the library, and hear about exciting FPGA projects from Ben Blundell and Rob Shelton.

Want to get in touch? Share your thoughts with @WillFlux or find me on 1BitSquared Discord.

This is the latest news post, but you can always browse the news archive.

Filled Circles

I’ve added a new filled circle drawing module to the Verilog Library. This rounds out our shape drawing: there are now outline and filled versions of triangles, rectangles, and circles. You can find all the drawing designs in the graphics section of the Verilog Library. All the drawing modules exceed 25 MHz on iCEBreaker: that’s drawing one pixel per clock cycle.

I’ve added a new rainbow demo using filled circles; see the 2D Shapes blog post for details.

Rainbow

More Numbers

Last month, I began a new series: Maths and Algorithms with FPGAs. I don’t have a new post for you this month, but I do have an improved version of Numbers in Verilog. Now with added endian and more literal goodness. Thanks to the open-source FPGA community for some excellent feedback that helped me improve this post.

Quick Updates

I’ve added my SystemVerilog UART design to the Verilog library. It’s one of my earliest SV designs and could use some polish, but I hope you still find it useful all the same.

I recently revised my guide to Verilog Simulation with Verilator and SDL. If you’re new to Verilator simulation, especially with graphics, you should find this useful.

In October, I started renaming modules and signals as outlined in the Project F roadmap. You can see an example of the new, simpler display module in Intro to FPGA Graphics.

News from Other Projects

If you know of any exciting FPGA projects I should feature in the news, do get in touch with @WillFlux or find me on 1BitSquared Discord.

A Game from Scratch

Ben Blundell (@benjamincpu) is building a computer game from scratch, starting from the PCB and working up. Excitingly, he’s planning to use designs from Project F!

Read more on Ben’s blog: Making A Computer Game From Scratch.

PAWS RISC-V SoC

Rob Shelton (@robng15) has just released PAWS v1 on GitHub. Designed for the ULX3S FPGA board and written in Silice, it’s a RISC-V RV32IMAFC processor with an 80s era SoC and display. Project F made a small contribution through the square root algorithm.

Find out more: PAWS on GitHub.

FPGA and RISC-V links that caught my eye:

For more great links, try Recommended FPGA Sites.

And Finally: Music Box Record Player

You may well be familiar with @Foone, one of the most interesting and prolific writers on Twitter (with a liking for floppy disks). Recently, Foone took apart a 2010 Fisher-Price Music Box Record Player. All was not as it first appeared (Twitter thread)

Music Box Record Player

This is the latest news post, but you can always browse the news archive.

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