Isle CPU
Published 22 Jan 2026
In part 2 of Building Isle, we add a RISC-V CPU, connect it to our hardware, add user input, and start to build our software tools and library. Each new component gets a complete working design, so you can clearly see how it works and adapt it to your own projects. These Building Isle chapters are initial sketches; I'll expand and refine them as Isle develops.
If you're new to the project, read Isle FPGA Computer for an introduction. See Isle Index for more pages.
The RISC-V chapter introduces a 32-bit RISC-V CPU, connects it to our hardware from part 1, and we write our first software in assembly language.
Isle code, docs, and tests are available from the Isle git repo under the MIT license. This blog, including Building Isle, is subject to standard copyright restrictions; don't republish it without permission.
Next step: RISC-V CPU or Isle Index