- Verilog Library - open-source FPGA designs for everyone
- FPGA Graphics - hands-on tutorial series
- Maths and Algorithms - hands-on tutorial series
- Hello - introduction to FPGA development
- Cookbook - handy recipes for FPGA designs, maths, and tools
- News - monthly project news, hints, tips, and handy links
New to Project F? Check out About Project F and Recommended FPGA Sites.
Verilog Library
The Project F Library includes handy Verilog designs from across Project F.
Read the Verilog Library Announcement or visit the Library on GitHub:
- Clock - clock generation (PLL) and domain crossing
- Display - display timings, framebuffer, DVI/HDMI output
- Essential - handy modules for many designs
- Graphics - drawing lines and shapes
- Maths - divide, LFSR, square root, sine…
- Memory - ROM and RAM designs, including BRAM and SPRAM
- UART - UART (serial) transmitter/receiver
FPGA Graphics
Learn graphics at the hardware level, create games and demos, improve your FPGA design skills:
- Intro to FPGA Graphics - draw your first FPGA graphics
- Pong - race the beam to create the arcade classic
- Hardware Sprites - fast, colourful, graphics with minimal logic
- Ad Astra - graphics demo with starfields and hardware sprites
- Framebuffers - driving the display from a bitmap in memory
- Life on Screen - the screen comes alive with Conway’s Game of Life
- Lines and Triangles - drawing lines and triangles with a framebuffer
- 2D Shapes - filling shapes and drawing pictures
- Animated Shapes - animation and double-buffering
Maths and Algorithms with FPGAs
- Numbers in Verilog - working with signed and unsigned integers
- Multiplication with FPGA DSPs - efficient multiplication with DSPs
A new series! Stay tuned for more parts over winter 2021-22.
Hello
A three-part introduction to FPGA development and Verilog with the Digilent Arty or Nexys Video boards:
- Part 1: Hello Arty 1 and Hello Nexys 1
- Part 2: Hello Arty 2 and Hello Nexys 2
- Part 3: Hello Arty 3 and coming winter 2021-22 for Nexys
Cookbook
Hardware & Devices
- SPRAM on iCE40 FPGA - use SPRAM with Yosys and compare it with Block RAM
- Memory Types - understand FPGA memory types, including BRAM, HBM, SRAM, and DRAM
- Initialize Memory in Verilog - use $readmemh and $readmemb to initialize RAM or ROM
- Video Timings: VGA, SVGA, 720p, 1080p - work with standard monitors and TVs
Maths
- Fixed Point Numbers - precision without floating-point complexity
- Division - simple division algorithm for integers and fixed-point
- Sine & Cosine - lookup sine and cosine from ROM
- Square Root - calculate square roots for integers and fixed-point
Tools & Testing
- Verilog Simulation with Verilator and SDL - blazingly fast way to simulate your designs
- Verilog Lint with Verilator - quickly check your Verilog designs
- Building iCE40 FPGA Toolchain on Linux - building an open source FPGA toolchain for iCE40
- FPGA Tooling on Ubuntu 20.04 - testing FPGA tools with Ubuntu 20.04 Focal Fossa