The square root is useful in many circumstances, including statistics, graphics, and signal processing. In this FPGA recipe, we’re going to look at a straightforward digit-by-digit square root algorithm for integer and fixed-point numbers. There are lower-latency methods, but this one is simple, using only subtraction and bit shifts. You might also be interested in Division in Verilog. Updated 2021-01-04. Feedback to @WillFlux is most welcome. Getting Radical The square root of a number is a second number that multiplied by itself produces the first number. Read more

Designing with FPGAs involves many types of memory, some familiar from other devices, but some that are specific to FPGAs. This FPGA recipe gives a quick overview of the different flavours, together with their strengths and weaknesses, and some sample designs. This guide includes external memory types, such as SRAM and HBM, that are used in CPUs and GPUs, so much of what is said here is generally applicable, but the focus is on FPGAs. Read more

Division is a fundamental arithmetic operation; one we take for granted in most contexts. FPGAs are different; Verilog can’t synthesize division: we need to do it ourselves. In this FPGA recipe, we’re going to look at a straightforward division algorithm for positive integers and fixed-point numbers. For integers, this method takes one cycle per bit: 32 cycles for 32-bit numbers. You might also be interested in Square Root in Verilog. Read more

To work with standard monitors and TVs, you need to use the correct video timings. This recipe includes the timings for four standard display modes using analogue VGA, DVI, HDMI, or DisplayPort: 640x480 (VGA), 800x600 (SVGA), 1280x720, and 1920x1080 all at 60 Hz. CRT monitors typically support higher refresh rates in addition to 60 Hz, such as 72 and 85 Hz, but most LCD monitors do not. There are an increasing number of televisions and monitors that do support high refresh rates, but these are beyond the scope of this guide. Read more

Sometimes you need more precision than integers can provide, but floating-point computation is not trivial (try reading IEEE 754). You could use a library or IP block, but simple fixed point maths can often get the job done with little effort. Furthermore, most FPGAs have dedicated DSP blocks that make multiplication and addition of integers fast; we can take advantage of that with a fixed-point approach. This post is part of a series of handy recipes to solve common FPGA development problems. Read more

It’s common for a simulation or firmware to need data loading into a memory array, ram, or rom. Fortunately, Verilog provides the $readmemh and $readmemb functions for this very purpose. Unfortunately, there is a dearth of good Verilog documentation online, so using them can be harder than it should be. This FPGA recipe explains the syntax and provides plenty of examples, including how to do this in Xilinx Vivado. If you want to learn more about FPGA memory itself, see FPGA Memory Types. Read more