27 May 2021

FPGA Sine Lookup Table

In this how to, we’re going to look at a straightforward method for generating sine and cosine using a lookup table. There are more precise methods, but this one is fast and simple and will suffice for many applications. This post was last updated in October 2022. There are also posts on fixed-point numbers, division, and square root. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) Sponsor My Work Read more

17 May 2021

Hello Arty - Part 3

Welcome back to our three-part FPGA tutorial with SystemVerilog and the Digilent Arty A7. In this third instalment, we build a countdown timer and model traffic lights. There’s a lot to get through this time: enums, case statements, button debouncing, shift registers, and the all-important finite state machine. This post was last updated in December 2021. New to the series? Start with part 1. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) Read more

27 April 2021

Project F Verilog Library

I like to learn by doing, by trying things out and experimenting. However, this is hard with FPGAs; there’s a significant lack of practical Verilog designs online. The Project F Library is the latest part of my attempt to make things a little better for FPGA hackers and beginners. Over the last couple of years, I’ve built up a small collection of handy Verilog modules. The Library brings these modules together with documentation and test benches to make them more accessible. Read more

17 March 2021

2D Shapes

Welcome back to Exploring FPGA Graphics. In 2D Shapes, we build on what we learned from Lines and Triangles in two ways: drawing new shapes and learning to colour them in. We’ll start with rectangles and filled triangles before moving on to circles. These basic shapes make it possible to create a wide variety of graphics and user interfaces. This post was revised in September 2022. Expect additional content over autumn 2022. Read more

11 February 2021

Hello Nexys - Part 2

Welcome back to our three-part FPGA tutorial with SystemVerilog and the Digilent Nexys Video. In part two, we’re going to learn about clocks and counting. Along the way, we’ll cover maintaining state with flip-flops, timing things with clock dividers, creating our first Verilog module, and controlling LEDs with pulse width modulation. This post is also available for the Arty. This post was last updated in December 2021. New to the series? Read more

28 January 2021

Lines and Triangles

Welcome back to Exploring FPGA Graphics. It’s time to turn our attention to drawing. Most modern computer graphics come down to drawing triangles and colouring them in. So, it seems fitting to begin our drawing tour with triangles and the straight lines that form them. This post will implement Bresenham’s line algorithm in Verilog and create lines, triangles, and even a cube (our first sort-of 3D). This post was last updated in November 2022. Read more

31 December 2020

Verilog Lint with Verilator

Hardware design can be unforgiving, so it pays to use any advantage you can get. Verilator is a Verilog simulator and C++ compiler that also supports linting: statically analysing your designs for issues. Not only can Verilator spot problems your synthesis tool might overlook, but it also runs quickly. Verilator is also great for graphics simulation with SDL. This post was last updated in July 2021. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) Read more

22 December 2020

Square Root in Verilog

The square root is useful in many circumstances, including statistics, graphics, and signal processing. In this how to, we’re going to look at a straightforward digit-by-digit square root algorithm for integer and fixed-point numbers. There are lower-latency methods, but this one is simple, using only subtraction and bit shifts. This post was last updated in June 2021. There are also posts on fixed-point numbers, division, and sine & cosine. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) Read more

11 November 2020

iCE40 FPGA Toolchain on Linux

Since I tested FPGA development tools on Ubuntu 20.04, there have been requests for more posts on FPGA tooling. In this post, I provide a quick guide to building an open-source FPGA toolchain for iCE40 boards, such as iCEBreaker. I plan to cover ECP5 FPGAs in a future version. This post was last updated in February 2022. This guide is designed for Ubuntu or Pop!_OS 20.04, but should be straightforward to adjust to your own distro. Read more

4 November 2020

Hello Nexys - Part 1

This three-part tutorial provides a quick introduction to FPGA development with SystemVerilog and the Digilent Nexys Video board. No prior experience of FPGA development is required, but basic knowledge of programming concepts is assumed. If you can write a simple program with Python or JavaScript, you shouldn’t have any trouble. This post was last updated in June 2021. I find working with FPGAs gives me a sense of delight so often lacking in modern software development. Read more

30 October 2020

Framebuffers

Welcome back to Exploring FPGA Graphics. In the previous part, we worked with sprites, but another approach is needed as graphics become more complex. Instead of drawing directly to the screen, we draw to a framebuffer, which is read out to the screen. This post provides an introduction to framebuffers and how to scale them up. We’ll also learn how to fizzlefade graphics Wolfenstein 3D style. This post was last updated in November 2022. Read more

28 October 2020

Hardware Sprites

Welcome back to Exploring FPGA Graphics. In the previous part, we updated our display signals and learnt about colour palettes. This part shows you how to create fast, colourful graphics with minimal logic. Hardware sprites maintain much of the simplicity of our Pong design while offering greater creative freedom. This post was completely revised in June 2022. In this series, we learn about graphics at the hardware level and get a feel for the power of FPGAs. Read more

22 September 2020

Life on Screen

In this FPGA demo we’ll experiment with Game of Life, a cellular automaton created by John Conway in 1970. This post was last updated in October 2022. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) This demo uses an old framebuffer design. For new projects, I recommend Framebuffers. Requirements For this demo you need an FPGA board with video output. I’ll be working with the Digilent Arty, but it should be easy to adapt this design to other boards. Read more

24 August 2020

FPGA Memory Types

Designing with FPGAs involves many types of memory, some familiar from other devices, but some that are specific to FPGAs. This how to gives a quick overview of the different flavours, together with their strengths and weaknesses, and some sample designs. This guide includes external memory types, such as SRAM and HBM, that are used in CPUs and GPUs, so much of what is said here is generally applicable, but the focus is on FPGAs. Read more

30 July 2020

FPGA Pong

Welcome back to Exploring FPGA Graphics. Last time, we raced the beam; this time, we’ll recreate the classic arcade Pong and play against our FPGA. This post was last updated in June 2022. This post was completely revised in April 2022. In this series, we learn about graphics at the hardware level and get a feel for the power of FPGAs. We’ll learn how screens work, play Pong, create starfields and sprites, paint Michelangelo’s David, draw lines and triangles, and animate characters and shapes. Read more

1 July 2020

Division in Verilog

Division is a fundamental arithmetic operation; one we take for granted in most contexts. FPGAs are different; Verilog can’t synthesize division: we need to do it ourselves. In this how to, we’re going to look at a straightforward division algorithm for positive integers and fixed-point numbers. For integers, this method takes one cycle per bit: 32 cycles for 32-bit numbers. This post was last updated June 2021. There are also posts on fixed-point numbers, square root, and sine & cosine. Read more

26 June 2020

Video Timings: VGA, SVGA, 720p, 1080p

To work with standard monitors and TVs, you need to use the correct video timings. This how to includes the timings for four standard display modes using analogue VGA, DVI, HDMI, or DisplayPort: 640x480 (VGA), 800x600 (SVGA), 1280x720, and 1920x1080 all at 60 Hz. CRT monitors typically support higher refresh rates in addition to 60 Hz, such as 72 and 85 Hz, but most LCD monitors do not. There are an increasing number of televisions and monitors that do support high refresh rates, but these are beyond the scope of this guide. Read more

10 June 2020

Ad Astra

These demos combine some of my earliest FPGA designs from 2018: simple sprites and an animated starfield generated with a linear-feedback shift register. I don’t recommend using this approach to sprites in new designs, check out the hardware sprites tutorial instead. This post was last updated in August 2022. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) Requirements For these demos you need an FPGA board with video output. Read more

26 May 2020

Fixed Point Numbers in Verilog

Sometimes you need more precision than integers can provide, but floating-point computation is not trivial (try reading IEEE 754). You could use a library or IP block, but simple fixed point maths can often get the job done with little effort. Furthermore, most FPGAs have dedicated DSP blocks that make multiplication and addition of integers fast; we can take advantage of that with a fixed-point approach. Revised post coming December 2022. Read more

20 May 2020

Beginning FPGA Graphics

Welcome to Exploring FPGA Graphics. In this series, we learn about graphics at the hardware level and get a feel for the power of FPGAs. We’ll learn how screens work, play Pong, create starfields and sprites, paint Michelangelo’s David, draw lines and triangles, and animate characters and shapes. Along the way, you’ll experience a range of designs and techniques, from memory and finite state machines to crossing clock domains and translating C algorithms into Verilog. Read more

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