To work with standard monitors and TVs, you need to use the correct video timings. This recipe includes the timings for four standard display modes using analogue VGA, DVI, HDMI, or DisplayPort: 640x480 (VGA), 800x600 (SVGA), 1280x720, and 1920x1080 all at 60 Hz. CRT monitors typically support higher refresh rates in addition to 60 Hz, such as 72 and 85 Hz, but most LCD monitors do not. There are an increasing number of televisions and monitors that do support high refresh rates, but these are beyond the scope of this guide. Read more

Welcome back to Exploring FPGA Graphics. In the previous part we learnt how to create hardware sprites. In this sixth part, we create a demo by combining our knowledge of sprites with animated starfields. I am working on a revised version of this post for summer 2022. In this series, we explore graphics at the hardware level and get a feel for the power of FPGAs. We’ll learn how displays work, race the beam with Pong, animate starfields and sprites, paint Michelangelo’s David, simulate life with bitmaps, draw lines and shapes, and create smooth animation with double buffering. Read more

Sometimes you need more precision than integers can provide, but floating-point computation is not trivial (try reading IEEE 754). You could use a library or IP block, but simple fixed point maths can often get the job done with little effort. Furthermore, most FPGAs have dedicated DSP blocks that make multiplication and addition of integers fast; we can take advantage of that with a fixed-point approach. This post was last updated in May 2021. Read more

Welcome to Exploring FPGA Graphics. In this series, we explore graphics at the hardware level and get a feel for the power of FPGAs. We’ll learn how screens work, play Pong, create starfields and sprites, paint Michelangelo’s David, simulate life, draw lines and triangles, and animate characters and shapes. Along the way, you’ll experience a range of designs and techniques, from memory and finite state machines to crossing clock domains and translating C algorithms into Verilog. Read more

Welcome back to our three-part FPGA tutorial with SystemVerilog and the Digilent Arty A7. In part two, we’re going to learn about clocks and counting. Along the way, we’ll cover maintaining state with flip-flops, timing things with clock dividers, creating our first Verilog module, and controlling LEDs with pulse width modulation. You might be surprised how far counting takes you: by the end of this tutorial, you’ll be creating RGB lighting effects worthy of a cheesy gaming PC. Read more

This three-part tutorial provides a quick introduction to FPGA development with SystemVerilog and the Digilent Arty A7 board. No prior experience of FPGA development is required, but basic knowledge of programming concepts is assumed. If you can write a simple program with Python or JavaScript, you shouldn’t have any trouble. This post was last updated in June 2021. I find working with FPGAs gives me a sense of delight so often lacking in modern software development. Read more

It’s common for a simulation or firmware to need data loading into a memory array, ram, or rom. Fortunately, Verilog provides the $readmemh and $readmemb functions for this very purpose. Unfortunately, there is a dearth of good Verilog documentation online, so using them can be harder than it should be. This FPGA recipe explains the syntax and provides plenty of examples, including how to do this in Yosys and Xilinx Vivado. Read more

In this post, I test common FPGA tools for compatibility with Ubuntu 20.04 (AKA Focal Fossa), and my regular desktop OS: Pop!_OS 20.04. These tests are in no way exhaustive: I have tried using the applications as I usually do to exercise the main functionality. I have also included instructions for building the tools from source when available. This is my final update for this post (July 2020). Tested: IceStorm Tools, nextpnr, nMigen, Verilator, Vivado, Yosys Incomplete: Quartus Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) Read more