22 September 2020

Life on Screen

Welcome back to Exploring FPGA Graphics. In this post we’re going to use the designs we created in Framebuffers to experiment with Conway’s Game of Life. In this series, we explore graphics at the hardware level and get a feel for the power of FPGAs. We’ll learn how displays work, race the beam with Pong, animate starfields and sprites, paint Michelangelo’s David, simulate life with bitmaps, draw lines and shapes, and finally render simple 3D models. Read more

24 August 2020

FPGA Memory Types

Designing with FPGAs involves many types of memory, some familiar from other devices, but some that are specific to FPGAs. This FPGA recipe gives a quick overview of the different flavours, together with their strengths and weaknesses, and some sample designs. This guide includes external memory types, such as SRAM and HBM, that are used in CPUs and GPUs, so much of what is said here is generally applicable, but the focus is on FPGAs. Read more

30 July 2020

Pong

Welcome back to Exploring FPGA Graphics. In the previous part, we got an introduction to FPGA graphics; now we’re ready to put our graphical skills to work recreating the arcade classic: Pong. In this series, we explore graphics at the hardware level and get a feel for the power of FPGAs. We’ll learn how displays work, race the beam with Pong, animate starfields and sprites, paint Michelangelo’s David, simulate life with bitmaps, draw lines and shapes, and finally render simple 3D models. Read more

1 July 2020

Division in Verilog

Division is a fundamental arithmetic operation; one we take for granted in most contexts. FPGAs are different; Verilog can’t synthesize division: we need to do it ourselves. In this FPGA recipe, we’re going to look at a straightforward division algorithm for positive integers and fixed-point numbers. For integers, this method takes one cycle per bit: 32 cycles for 32-bit numbers. You might also be interested in Square Root in Verilog. Read more

26 June 2020

Video Timings: VGA, SVGA, 720p, 1080p

To work with standard monitors and TVs, you need to use the correct video timings. This recipe includes the timings for four standard display modes using analogue VGA, DVI, HDMI, or DisplayPort: 640x480 (VGA), 800x600 (SVGA), 1280x720, and 1920x1080 all at 60 Hz. CRT monitors typically support higher refresh rates in addition to 60 Hz, such as 72 and 85 Hz, but most LCD monitors do not. There are an increasing number of televisions and monitors that do support high refresh rates, but these are beyond the scope of this guide. Read more

10 June 2020

Ad Astra

Welcome back to Exploring FPGA Graphics. In the previous part we learnt how to create hardware sprites. In this fourth part, we create a demo by combining our knowledge of sprites with animated starfields. In this series, we explore graphics at the hardware level and get a feel for the power of FPGAs. We’ll learn how displays work, race the beam with Pong, animate starfields and sprites, paint Michelangelo’s David, simulate life with bitmaps, draw lines and shapes, and finally render simple 3D models. Read more

26 May 2020

Fixed Point Numbers in Verilog

Sometimes you need more precision than integers can provide, but floating-point computation is not trivial (try reading IEEE 754). You could use a library or IP block, but simple fixed point maths can often get the job done with little effort. Furthermore, most FPGAs have dedicated DSP blocks that make multiplication and addition of integers fast; we can take advantage of that with a fixed-point approach. This post is part of a series of handy recipes to solve common FPGA development problems. Read more

20 May 2020

FPGA Graphics

Welcome to Exploring FPGA Graphics. In this series, we explore graphics at the hardware level and get a feel for the power of FPGAs. We’ll learn how displays work, race the beam with Pong, animate starfields and sprites, paint Michelangelo’s David, simulate life with bitmaps, draw lines and shapes, and finally render simple 3D models. Along the way, you’ll experience a Smörgåsbord of designs and techniques, from BRAM and finite state machines to crossing clock domains and translating C algorithms into Verilog. Read more

6 May 2020

Hello Arty - Part 2

Welcome back to our three-part FPGA tutorial with SystemVerilog and the Digilent Arty A7. In part two, we’re going to learn about clocks and counting. Along the way, we’ll cover maintaining state with flip-flops, timing things with clock dividers, creating our first Verilog module, and controlling LEDs with pulse width modulation. You might be surprised how far counting takes you: by the end of this tutorial, you’ll be creating RGB lighting effects worthy of a cheesy gaming PC. Read more

24 April 2020

Hello Arty - Part 1

This three-part tutorial provides a quick introduction to FPGA development with SystemVerilog and the Digilent Arty A7 board. No prior experience of FPGA development is required, but basic knowledge of programming concepts is assumed. If you can write a simple program in Arduino, Python, or JavaScript, then you shouldn’t have any trouble. I find working with FPGAs gives me a sense of delight so often lacking in modern software development. There’s something profoundly satisfying about designing at the hardware level, be it drawing graphics on a screen, producing sound from a speaker, or even implementing your own arcade game from scratch. Read more

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