It can be challenging to test your FPGA or ASIC graphics designs. You can perform low-level behavioural simulations and examine waveforms, but you also need to verify how the video output will appear on the screen. By combining Verilator and SDL, you can build Verilog simulations that let you see your design on your computer. The thought of creating a graphical simulation can be intimidating, but it’s surprisingly simple: you’ll have your first simulation running in under an hour. Read more

As well as the occasional big blog post, I make many smaller FPGA discoveries and Project F updates each month. I thought it would be interesting to share a few of these in a monthly news post. What do you think? Let me know via @WillFlux@mastodon.social or open an issue on GitHub. Read the June 2021 news or see the news archive. Blog In May, I added two blog posts: Hello Arty Part 3 and FPGA Sine Lookup Table. Read more

In this how to, we’re going to look at a straightforward method for generating sine and cosine using a lookup table. There are more precise methods, but this one is fast and simple and will suffice for many applications. This post was last updated in October 2022. New to Verilog maths? Check out my introduction to Numbers in Verilog. Get in touch with @WillFlux or join me on GitHub Discussions and 1BitSquared Discord. Read more

Welcome back to our three-part FPGA tutorial with SystemVerilog and the Digilent Arty A7. In this third instalment, we build a countdown timer and model traffic lights. There’s a lot to get through this time: enums, case statements, button debouncing, shift registers, and the all-important finite state machine. This post was last updated in December 2021. New to the series? Start with part 1. Get in touch with @WillFlux or join me on GitHub Discussions and 1BitSquared Discord. Read more

I like to learn by doing, by trying things out and experimenting. However, this is hard with FPGAs; there’s a significant lack of practical Verilog designs online. The Project F Library is the latest part of my attempt to make things a little better for FPGA hackers and beginners. Over the last couple of years, I’ve built up a small collection of handy Verilog modules. The Library brings these modules together with documentation and test benches to make them more accessible. Read more

Welcome back to Exploring FPGA Graphics. In 2D Shapes, we build on what we learned from Lines and Triangles in two ways: drawing new shapes and learning to colour them in. We’ll start with rectangles and filled triangles before moving on to circles. These basic shapes make it possible to create a wide variety of graphics and user interfaces. This post was revised in September 2022. Expect additional explanation in 2023. Read more

Welcome back to our three-part FPGA tutorial with SystemVerilog and the Digilent Nexys Video. In part two, we’re going to learn about clocks and counting. Along the way, we’ll cover maintaining state with flip-flops, timing things with clock dividers, creating our first Verilog module, and controlling LEDs with pulse width modulation. This post is also available for the Arty. This post was last updated in December 2021. New to the series? Read more

Welcome back to Exploring FPGA Graphics. It’s time to turn our attention to drawing. Most modern computer graphics come down to drawing triangles and colouring them in. So, it seems fitting to begin our drawing tour with triangles and the straight lines that form them. This post will implement Bresenham’s line algorithm in Verilog and create lines, triangles, and even a cube (our first sort-of 3D). This post was last updated in January 2023. Read more

Hardware design can be unforgiving, so it pays to use any advantage you can get. Verilator is a Verilog simulator and C++ compiler that also supports linting: statically analysing your designs for issues. Not only can Verilator spot problems your synthesis tool might overlook, but it also runs quickly. Verilator is also great for graphics simulation with SDL. This post was last updated in July 2021. Get in touch with @WillFlux or join me on GitHub Discussions and 1BitSquared Discord. Read more

The square root is useful in many circumstances, including statistics, graphics, and signal processing. In this how to, we’re going to look at a straightforward digit-by-digit square root algorithm for integer and fixed-point numbers. There are lower-latency methods, but this one is simple, using only subtraction and bit shifts. This post was last updated in June 2021. New to Verilog maths? Check out my introduction to Numbers in Verilog. Get in touch with @WillFlux or join me on GitHub Discussions and 1BitSquared Discord. Read more

Since I tested FPGA development tools on Ubuntu 20.04, there have been requests for more posts on FPGA tooling. In this post, I provide a quick guide to building an open-source FPGA toolchain for iCE40 boards, such as iCEBreaker. I plan to cover ECP5 FPGAs in a future version. This post was last updated in February 2022. This guide is designed for Ubuntu or Pop!_OS 20.04, but should be straightforward to adjust to your own distro. Read more

This three-part tutorial provides a quick introduction to FPGA development with SystemVerilog and the Digilent Nexys Video board. No prior experience of FPGA development is required, but basic knowledge of programming concepts is assumed. If you can write a simple program with Python or JavaScript, you shouldn’t have any trouble. This post was last updated in June 2021. I find working with FPGAs gives me a sense of delight so often lacking in modern software development. Read more

Welcome back to Exploring FPGA Graphics. In the previous part, we worked with sprites, but another approach is needed as graphics become more complex. Instead of drawing directly to the screen, we draw to a framebuffer, which is read out to the screen. This post provides an introduction to framebuffers and how to scale them up. We’ll also learn how to fizzlefade graphics Wolfenstein 3D style. This post was last updated in November 2022. Read more

Welcome back to Exploring FPGA Graphics. In the previous part, we updated our display signals and learnt about colour palettes. This part shows you how to create fast, colourful graphics with minimal logic. Hardware sprites maintain much of the simplicity of our Pong design while offering greater creative freedom. This post was completely revised in June 2022. In this series, we learn about graphics at the hardware level and get a feel for the power of FPGAs. Read more

In this FPGA demo we’ll experiment with Game of Life, a cellular automaton created by John Conway in 1970. This post was last updated in October 2022. Get in touch with @WillFlux or join me on GitHub Discussions and 1BitSquared Discord. This demo uses an old framebuffer design. For new projects, I recommend Framebuffers. Requirements For this demo you need an FPGA board with video output. I’ll be working with the Digilent Arty, but it should be easy to adapt this design to other boards. Read more

Designing with FPGAs involves many types of memory, some familiar from other devices, but some that are specific to FPGAs. This how to gives a quick overview of the different flavours, together with their strengths and weaknesses, and some sample designs. This guide includes external memory types, such as SRAM and HBM, that are used in CPUs and GPUs, so much of what is said here is generally applicable, but the focus is on FPGAs. Read more

Welcome back to Exploring FPGA Graphics. Last time, we raced the beam; this time, we’ll recreate the classic arcade Pong and play against our FPGA. This post was last updated in June 2022. This post was completely revised in April 2022. In this series, we learn about graphics at the hardware level and get a feel for the power of FPGAs. We’ll learn how screens work, play Pong, create starfields and sprites, paint Michelangelo’s David, draw lines and triangles, and animate characters and shapes. Read more

Division is a fundamental arithmetic operation we take for granted. FPGAs include dedicated hardware to perform addition, subtraction, and multiplication and will infer the necessary logic. Division is different: we need to do it ourselves. This post looks at a straightforward division algorithm for positive integers before extending it to cover fixed-point numbers and signed numbers. New to Verilog maths? Check out my introduction to Numbers in Verilog. This post was completely revised in January 2023. Read more

To work with standard monitors and TVs, you need to use the correct video timings. This how to includes the timings for four standard display modes using analogue VGA, DVI, HDMI, or DisplayPort: 640x480 (VGA), 800x600 (SVGA), 1280x720, and 1920x1080 all at 60 Hz. CRT monitors typically support higher refresh rates in addition to 60 Hz, such as 72 and 85 Hz, but most LCD monitors do not. There are an increasing number of televisions and monitors that do support high refresh rates, but these are beyond the scope of this guide. Read more

These demos combine some of my earliest FPGA designs from 2018: simple sprites and an animated starfield generated with a linear-feedback shift register. I don’t recommend using this approach to sprites in new designs, check out the hardware sprites tutorial instead. This post was last updated in August 2022. Get in touch with @WillFlux or join me on GitHub Discussions and 1BitSquared Discord. Requirements For these demos you need an FPGA board with video output. Read more