# Multiplication with FPGA DSPs

Welcome back to my series covering mathematics and algorithms with FPGAs. Project F is known for its practical, hands-on tutorials. So, I decided to dedicate a post to a topic usually ignored by introductory guides: multiplication with DSPs. This post was last updated in November 2022. New to the series? Start with Numbers in Verilog. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) Series Outline Numbers in Verilog - introduction to numbers in Verilog Verilog Vectors and Arrays (coming soon) Fixed-Point Numbers in Verilog - precision without complexity Multiplication with FPGA DSPs (this post) - efficient multiplication with DSPs More maths in 2023 Sponsor My Work

# Numbers in Verilog

Welcome to my ongoing series covering mathematics and algorithms with FPGAs. This series begins with the basics of Verilog numbers, then considers fixed-point, division, square roots and CORDIC before covering more complex algorithms, such as data compression. In this first post, we consider integers, dig into the challenges of signed numbers and expressions, and then finish with a bit of arithmetic. This post was completely revised in November 2022. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter)

# FPGA Sine Lookup Table

In this how to, we’re going to look at a straightforward method for generating sine and cosine using a lookup table. There are more precise methods, but this one is fast and simple and will suffice for many applications. This post was last updated in October 2022. There are also posts on fixed-point numbers, division, and square root. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) Sponsor My Work

# Square Root in Verilog

The square root is useful in many circumstances, including statistics, graphics, and signal processing. In this how to, we’re going to look at a straightforward digit-by-digit square root algorithm for integer and fixed-point numbers. There are lower-latency methods, but this one is simple, using only subtraction and bit shifts. This post was last updated in June 2021. There are also posts on fixed-point numbers, division, and sine & cosine. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter)

# Life on Screen

In this FPGA demo we’ll experiment with Game of Life, a cellular automaton created by John Conway in 1970. This post was last updated in October 2022. Get in touch: GitHub Issues, 1BitSquared Discord, @WillFlux (Mastodon), @WillFlux (Twitter) This demo uses an old framebuffer design. For new projects, I recommend Framebuffers. Requirements For this demo you need an FPGA board with video output. I’ll be working with the Digilent Arty, but it should be easy to adapt this design to other boards.

# Division in Verilog

Division is a fundamental arithmetic operation; one we take for granted in most contexts. FPGAs are different; Verilog can’t synthesize division: we need to do it ourselves. In this how to, we’re going to look at a straightforward division algorithm for positive integers and fixed-point numbers. For integers, this method takes one cycle per bit: 32 cycles for 32-bit numbers. This post was last updated June 2021. There are also posts on fixed-point numbers, square root, and sine & cosine.

# Fixed Point Numbers in Verilog

Sometimes you need more precision than integers can provide, but floating-point computation is not trivial (try reading IEEE 754). You could use a library or IP block, but simple fixed point maths can often get the job done with little effort. Furthermore, most FPGAs have dedicated DSP blocks that make multiplication and addition of integers fast; we can take advantage of that with a fixed-point approach. Revised post coming December 2022.